Ethernet SDR Interfacing [and 7 more messages]

[Maitland Bottoms]

Hmm. I've got a few comments to make on this thread, so I might
as well do it all at once....

wb4jfi writes:
 >   I'm thinking of adding an Ethernet interface capability to the 
 > Charleston SDR receiver.  This would also allow me to learn Ethernet 
 > interfacing with some of the newer designs.

Yes. Me too.
Getting the NEXYS2 was cool, and I need to thank you for turning me on to
its coolness. However, I still did pine for Ethernet.

I read with great relish the fpga4fun 10BASE-T interface info:
"The Ethernet full-duplex protocol is easy to implement in an FPGA."
http://www.fpga4fun.com/10BASE-T.html

There's other plaforms out there besides the NEXYS2,
so I've gotten a Digilent Spartan 3E-Starter board and the Xilinx
Spartan-3AN Starter Kit, both of which have a nice RJ-45 connector
and ethernet interface right there on the board.

I figure I'd plug in my Charleston to one of those and go to town.
But! The other starter boards do not have the nice quad-PMOD headers
to "just plug in" the Charleston. Perhaps some hirose FX2 connector
to multiple PMOD connectors would be a useful bit of hardware.
I'll get to that right after I shave this yak.

Another future Charleston host would be the SIE:
http://en.qi-hardware.com/wiki/SIE
But it doesn't have the Ethernet we want.

Robert E. Seastrom writes:
 > I kind of think there's no point in doing 10 mbit/sec ethernet in
 > 2010.  100m is *almost* in the same department, depending on the cost
 > of gigabit ethernet capable NIC and PHY.

Yeah. That's the reason (rather than my own laziness) that I didn't
do anything useful with the various boards I have.

But, it is not clear to me that gigabit is going to work well with
these low-cost, free Webpack supported FPGAs. It's really fast, and there
are special parts of the more expensive chips like the Virtex-5 to make it work.

Part of the fun of following along with the Charlston project is what we
can learn while still sticking to a beer budget.

wb4jfi writes:
 > I used to like Firewire (a LOT), but between the driver issues, and the 
 > cost of embedding those devices, no thanks.  Plus, try to buy a laptop 
 > computer with Firewire for under $1,000...

I just got one for $125. (Oh. So it's used, and there weren't lots
available. And it probably cost the initial buyer a heck of a lot
more that $1,000. Nevermind. And I notice my cute new Intel Atom based
systems (why should your computer be bigger than your FPGA eval board)
does not have firewire.)

 > One major issue is that most computers have only one ethernet 
 > connection.  So, if you want to use the e'net connection for both the 
 > SDR and Internet, a small switch must be used.  Or, wireless can be used 
 > for the Internet (on a laptop).

And it is not clear to me that some of the FPGA ethernet solutions
really work with the switch. The USRP2 seems to really prefer dedicated
direct connections.

Mike O'Dell writes:
 > things you need to worry about picking ethernet interface goobers:
 > 
 > (1) can the part do GigE flat-out?
 > (2) how much stupid fiddling does it need to send a frame?

That was my worry earlier about the suitablility of these budget parts.
The big fast expensive things can probably deal with the Gbps data
streams. But an interface that takes care of converting the serial
stream into an 8-bit bus still has a 125 MHz clock to go with that bus.
And a lot more wiring to move it around.

That said, the OZYII page says:
"The choice of a Micrel KSZ9021RL PHY chip looks like paying off.
The chip uses the RGMII interface standard which means it only requires
12 pins in order to connect to the associated FPGA."
 --http://openhpsdr.org/wiki/index.php?title=OZYII


Patirck Strasser writes:
 > I'm using Linux for most things, there you have different problems.

Oh yes, but I do see progress.

My heart sank when I got my NEXYS2 and learned about the Windows-Only
Digilent Adept Suite and under-documented Xilinx iMPACT tools. But a
quick search got me to use the cute little Perl nexys2prog script, and
so I've always used Linux to run the Xilinx Webpack ISE to make .bit
files and nexys2prog to load the board.

And when I set out to use the Spartan 3E-Starter, I used a similar
strategy to develop for an load it from Linux. All the good stuff
is now at
http://ixo-jtag.sourceforge.net/

(Even better, since I've started down that route, the assembler parts
of sdcc got re-licensed, and so all the pieces needed to make JTAG
tools work with FX2 style USB harware are all Free Software.)

Alas I have yet to get this approach to work with the 3AN board.

Still, much hacking is going on with the FX2, and we've got free
options (UrJTAG, OpenOCD http://openocd.berlios.de/web/) to some
of the vendor tools.

For those who didn't follow the links, I program the NEXYS2 from Linux
by first using the fxload application to replace the stock FX2 USB
firmware with some 8051 code that makes the interface look like
another USB JTAG cable. Doing that even changes the USB ID on the
bus as seen from the host computer. The changes revert back once
the NEXYS2 board is power cycled. So I load USB firmware in order
to load FPGA firmware.

 > You're very flexible with Ethernet. If you need galvanic isolation, you 
 > can even take an optical link, and bridge very long distances.

I've taken an interest in the SFP.
http://en.wikipedia.org/wiki/Small_form-factor_pluggable_transceiver
It has good features in only a few pins to interface, low cost and
high availibility.

Mark Whittington writes:
 > Have you considered emulating what the USRP2 does, either from a hardware or
 > software perspective, or both?

That motivated me a bit. So far it seems to really like a dedicated
point-to-point gigabit ethernet link, since it really uses it as a hardware
link and doesn't have a complete networking stack to coexist on shared LANs.

And what about xguff?
That would make any of these FX2 USB using FPGA boards look like a USRP1:
http://recycle.lbl.gov/~ldoolitt/xguff.html

More than enough for now.
Best of luck to all you SDR and FPGA hackers,
-Maitland