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</o:shapelayout></xml><![endif]--></head><body lang=EN-US link=blue vlink=purple><div class=WordSection1><p class=MsoNormal>For the group, I am providing a screenshot of the Vivado WebPack (free edition) installation screenshot, that shows the “limited” support with details at <a href="https://www.xilinx.com/products/design-tools/vivado/vivado-webpack.html#architecture">https://www.xilinx.com/products/design-tools/vivado/vivado-webpack.html#architecture</a><o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal><img border=0 width=873 height=670 style='width:9.0916in;height:6.9833in' id="Picture_x0020_1" src="cid:image002.jpg@01D5FBCA.1EFE8560"><o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal><b>From:</b> Samudra Haque <samudra.haque@gmail.com> <br><b>Sent:</b> Monday, March 16, 2020 2:13 PM<br><b>To:</b> Martin <dcmk1mr2@gmail.com><br><b>Cc:</b> Terry N4TLF <n4tlf@wb4jfi.com>; Tacos <Tacos@amrad.org><br><b>Subject:</b> Re: anyone with an entry level FPGA development board (VHDL support) they don't need?<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><div><p class=MsoNormal>Spartan 7 is supported by vivado web pack free edition at the current time. Just checked.<o:p></o:p></p></div><p class=MsoNormal><o:p> </o:p></p><div><div><p class=MsoNormal>On Mon, Mar 16, 2020, 14:11 Martin <<a href="mailto:dcmk1mr2@gmail.com">dcmk1mr2@gmail.com</a>> wrote:<o:p></o:p></p></div><blockquote style='border:none;border-left:solid #CCCCCC 1.0pt;padding:0in 0in 0in 6.0pt;margin-left:4.8pt;margin-right:0in'><div><p class=MsoNormal>Lattice iCE uses much less power than the competition. That is one of their selling points. <o:p></o:p></p><div><p class=MsoNormal><o:p> </o:p></p></div><div><p class=MsoNormal>The board you mentioned uses a Xilinx Spartan chip. This requires Xilinx ISE Suite which is being deprecated. The Windows version include a VM so that the linux ISE version is actually used.<o:p></o:p></p></div><div><p class=MsoNormal><o:p> </o:p></p></div><div><p class=MsoNormal>The iCE board that Jacek got looks really nice for what it is.<o:p></o:p></p></div><div><p class=MsoNormal><o:p> </o:p></p></div><div><p class=MsoNormal>I think that once you understand FPGAs more you'll discover that hardware is better suited for timing control and the processor might not need a RTOS.<o:p></o:p></p><div><p class=MsoNormal><o:p> </o:p></p></div><div><p class=MsoNormal>Martin<o:p></o:p></p></div></div></div><p class=MsoNormal><o:p> </o:p></p><div><div><p class=MsoNormal>On Mon, Mar 16, 2020 at 9:31 AM Terry N4TLF <<a href="mailto:n4tlf@wb4jfi.com" target="_blank">n4tlf@wb4jfi.com</a>> wrote:<o:p></o:p></p></div><blockquote style='border:none;border-left:solid #CCCCCC 1.0pt;padding:0in 0in 0in 6.0pt;margin-left:4.8pt;margin-right:0in'><div><div><div><div><p class=MsoNormal><span style='font-size:10.0pt;font-family:"Arial",sans-serif;color:black'>MicroBlaze used to cost significant dollars to use. PicoBlaze was the smaller, no-cost option.<o:p></o:p></span></p></div><div><p class=MsoNormal><span style='font-size:10.0pt;font-family:"Arial",sans-serif;color:black'> <o:p></o:p></span></p></div><div><p class=MsoNormal><span style='font-size:10.0pt;font-family:"Arial",sans-serif;color:black'>Beware of hidden costs associated with the IDE tools. I bought one Xilinx-based board, where the Vivaldo license was locked to the one board, and for only a limited time. Once that time expired, yu needed to purchase a regular license. On the other hand, the Altera line has/had issues where they discontinue support for lines of FPGA chips as they update the IDE.<o:p></o:p></span></p></div><div><p class=MsoNormal><span style='font-size:10.0pt;font-family:"Arial",sans-serif;color:black'> <o:p></o:p></span></p></div><div><p class=MsoNormal><span style='font-size:10.0pt;font-family:"Arial",sans-serif;color:black'>One other point regarding FPGAs, most tend to be power hogs.<o:p></o:p></span></p></div><div><p class=MsoNormal><span style='font-size:10.0pt;font-family:"Arial",sans-serif;color:black'>Terry<o:p></o:p></span></p></div><div><p class=MsoNormal><span style='font-size:10.0pt;font-family:"Arial",sans-serif;color:black'> <o:p></o:p></span></p></div><div><div><div><p class=MsoNormal><span style='font-size:10.0pt;font-family:"Tahoma",sans-serif;color:black'> <o:p></o:p></span></p></div><div><div><p class=MsoNormal style='background:whitesmoke'><b><span style='font-size:10.0pt;font-family:"Tahoma",sans-serif;color:black'>From:</span></b><span style='font-size:10.0pt;font-family:"Tahoma",sans-serif;color:black'> <a href="mailto:samudra.haque@gmail.com">samudra.haque@gmail.com</a> <o:p></o:p></span></p></div><div><p class=MsoNormal style='background:whitesmoke'><b><span style='font-size:10.0pt;font-family:"Tahoma",sans-serif;color:black'>Sent:</span></b><span style='font-size:10.0pt;font-family:"Tahoma",sans-serif;color:black'> Monday, March 16, 2020 12:12 PM<o:p></o:p></span></p></div><div><p class=MsoNormal style='background:whitesmoke'><b><span style='font-size:10.0pt;font-family:"Tahoma",sans-serif;color:black'>To:</span></b><span style='font-size:10.0pt;font-family:"Tahoma",sans-serif;color:black'> 'Martin' <o:p></o:p></span></p></div><div><p class=MsoNormal style='background:whitesmoke'><b><span style='font-size:10.0pt;font-family:"Tahoma",sans-serif;color:black'>Cc:</span></b><span style='font-size:10.0pt;font-family:"Tahoma",sans-serif;color:black'> 'Terry N4TLF' ; 'Tacos' <o:p></o:p></span></p></div><div><p class=MsoNormal style='background:whitesmoke'><b><span style='font-size:10.0pt;font-family:"Tahoma",sans-serif;color:black'>Subject:</span></b><span style='font-size:10.0pt;font-family:"Tahoma",sans-serif;color:black'> RE: anyone with an entry level FPGA development board (VHDL support) they don't need?<o:p></o:p></span></p></div></div></div><div><p class=MsoNormal><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p></div></div><div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>Hey all, I just noticed from Joel’s list this one priced economically at $35.90 … <a href="https://www.seeedstudio.com/Spartan-Edge-Accelerator-Board-p-4261.html?utm_source=mailchimp&utm_medium=edm&utm_campaign=bazaar_0919&ct=t&mc_cid=2972c7f3ab&mc_eid=5f0fb45d80" target="_blank">https://www.seeedstudio.com/Spartan-Edge-Accelerator-Board-p-4261.html?utm_source=mailchimp&utm_medium=edm&utm_campaign=bazaar_0919&ct=t&mc_cid=2972c7f3ab&mc_eid=5f0fb45d80</a><o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>Looks interesting no? <span style='background:yellow'>if treated as a standalone FPGA board</span> – which it can be instead of an Arduino accessory. Any drawbacks? It’s an FPGA development system I understand that. But then I read that MicroBlaze (Vivado) that can then host FreeRTOS. <a href="https://www.freertos.org/a00090.html#XILINX" target="_blank">https://www.freertos.org/a00090.html#XILINX</a>.<o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>So, essentially a replacement for Intel Max 10, Nios II, FreeRTOS combination, at a cheaper I think price, with more gates, and a development board that is current production with a host of documentation? <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'><a href="http://wiki.seeedstudio.com/Spartan-Edge-Accelerator-Board/" target="_blank">http://wiki.seeedstudio.com/Spartan-Edge-Accelerator-Board/</a><o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>Samudra<o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><div><div style='border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0in 0in 0in;border-right-color:initial;border-bottom-color:initial;border-left-color:initial'><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><b><span style='font-size:12.0pt;color:black'>From:</span></b><span style='font-size:12.0pt;color:black'> <a href="mailto:samudra.haque@gmail.com" target="_blank">samudra.haque@gmail.com</a> <<a href="mailto:samudra.haque@gmail.com" target="_blank">samudra.haque@gmail.com</a>> <br><b>Sent:</b> Monday, March 16, 2020 11:30 AM<br><b>To:</b> 'Martin' <<a href="mailto:dcmk1mr2@gmail.com" target="_blank">dcmk1mr2@gmail.com</a>><br><b>Cc:</b> 'Terry N4TLF' <<a href="mailto:n4tlf@wb4jfi.com" target="_blank">n4tlf@wb4jfi.com</a>>; 'Tacos' <<a href="mailto:tacos@amrad.org" target="_blank">tacos@amrad.org</a>><br><b>Subject:</b> RE: anyone with an entry level FPGA development board (VHDL support) they don't need?<o:p></o:p></span></p></div></div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>Hi, Martin, Terry – I zoomed through to try and Intel’s Quartus and the Nios II Embedded Development System to go through a simulated design cycle all the way upto a pin-out matching stage for a real processor. It included adding specific Verilog code to handle some simple-enough signal flow (and, xor, not) etc. for some of the control lines. I was able to figure out quickly the workflow, to synthesize and reach stages before simulation which included “wiring” up the section of the soft processor to the other soft peripherals. <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>I obviously don’t have hardware, and the tutorial assumed all was available in the development board and did not try to actually simulate the circuit as I wanted to evaluate how difficult the challenge of learning these tools were going to be – my confidence is increasing because of this.<o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>That said, another friend explained:<o:p></o:p></span></p><ul type=disc><li class=MsoNormal style='color:black;mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;mso-list:l0 level1 lfo1'><span style='font-size:12.0pt'>FPGA <o:p></o:p></span></li><li class=MsoNormal style='color:black;mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;mso-list:l0 level1 lfo1'><span style='font-size:12.0pt'>FPGA + soft CPU (e.g. Soft processor core in an FPGA, perhaps many of them, and the rest available for standard FPGA applications) <o:p></o:p></span></li><li class=MsoNormal style='color:black;mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;mso-list:l0 level1 lfo1'><span style='font-size:12.0pt'>FPGA + hard CPU (e.g. Silicon with an embedded hard processor core and FPGA section on same die)<o:p></o:p></span></li></ul><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p><span style='font-size:12.0pt;color:black'>My hope is to run a FreeRTOS or uC/OS-II as supervisory operating system, with command/telemetry/control/sensor management roles. The FPGA would be for development of the all-important interfaces and logic that would change from project to project. Low capacity (1200 bps, 9600 bps) RF communications. Absolutely target a lower power/lower capacity system. <o:p></o:p></span></p><p><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p><span style='font-size:12.0pt;color:black'>So I was wondering if I could ask your opinion on this low cost board I saw discussed in <a href="https://joelw.id.au/FPGA/CheapFPGADevelopmentBoards" target="_blank">https://joelw.id.au/FPGA/CheapFPGADevelopmentBoards</a>, from the OMTECH seller <a href="https://www.aliexpress.com/item/4000323573953.html" target="_blank">https://www.aliexpress.com/item/4000323573953.html</a><o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>Are US equivalents available somewhere in the same price range? It’s about the same price as a Intel Max10 FPGA development board (No SOC)<o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>N3RDX<o:p></o:p></span></p><div><div style='border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0in 0in 0in;border-right-color:initial;border-bottom-color:initial;border-left-color:initial'><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><b><span style='font-size:12.0pt;color:black'>From:</span></b><span style='font-size:12.0pt;color:black'> <a href="mailto:samudra.haque@gmail.com">samudra.haque@gmail.com</a> <<a href="mailto:samudra.haque@gmail.com">samudra.haque@gmail.com</a>> <br><b>Sent:</b> Sunday, March 15, 2020 1:01 PM<br><b>To:</b> 'Martin' <<a href="mailto:dcmk1mr2@gmail.com">dcmk1mr2@gmail.com</a>><br><b>Cc:</b> 'Terry N4TLF' <<a href="mailto:n4tlf@wb4jfi.com">n4tlf@wb4jfi.com</a>>; 'Tacos' <<a href="mailto:tacos@amrad.org">tacos@amrad.org</a>><br><b>Subject:</b> RE: anyone with an entry level FPGA development board (VHDL support) they don't need?<o:p></o:p></span></p></div></div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>Thanks, I’ll have to spend time on different fpga vendor websites. <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><b><span style='font-size:12.0pt;color:black'>From:</span></b><span style='font-size:12.0pt;color:black'> Martin <<a href="mailto:dcmk1mr2@gmail.com">dcmk1mr2@gmail.com</a>> <br><b>Sent:</b> Saturday, March 14, 2020 7:06 PM<br><b>To:</b> Samudra Haque <<a href="mailto:samudra.haque@gmail.com">samudra.haque@gmail.com</a>><br><b>Cc:</b> Terry N4TLF <<a href="mailto:n4tlf@wb4jfi.com">n4tlf@wb4jfi.com</a>>; Tacos <<a href="mailto:tacos@amrad.org">tacos@amrad.org</a>><br><b>Subject:</b> Re: anyone with an entry level FPGA development board (VHDL support) they don't need?<o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><div><div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>Samudra - the flowchart you posted is for the NIOS II Embedded Processor Design Suite not Quartus Prime Lite for FPGA and SoCs. NIOS II is a fairly complex 32 bit processor that you probably would never need for an embedded system.<o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p></div></div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>If you want a complex development framework then Quartus is probably a good choice - it will take you weeks or months to become proficient. Once proficient you can start learning a HDL and FPGA concepts. <o:p></o:p></span></p><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>ISE Design Suite, the IDE for older low end Xilinx Spartan FPGAs like the Spartan 6 has been deprecated to help sales of new chips. <o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>Note that Intel/Altera makes money on IP and there's a lot of open source stuff available for Lattice. I remember seeing an IDE that worked like gnuradio-companion and took functional blocks like filters/ modulator/demodulator to compile for Lattice FPGAs. <o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>--Martin<o:p></o:p></span></p></div></div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>On Sat, Mar 14, 2020 at 3:12 PM <<a href="mailto:samudra.haque@gmail.com">samudra.haque@gmail.com</a>> wrote:<o:p></o:p></span></p></div><blockquote style='border:none;border-left:solid #CCCCCC 1.0pt;padding:0in 0in 0in 6.0pt;margin-left:4.8pt;margin-top:5.0pt;margin-right:0in;margin-bottom:5.0pt;border-top-color:initial;border-right-color:initial;border-bottom-color:initial'><div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>Well, yes, Martin, but I willing to take on a complex development framework during the Corona virus downtimes for the benefit it might give me, as I get ready to produce another piece of unique technology this year.<o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>I admit: so far without an EE formal education, but rather a CS background with practical hardware projects, I was 0.25 EE degree in 1989, 0.5 EE in 1997 when I developed broadband microwave equipment, 0.75 EE by the post-grad development from fundamentals to flight hardware. I wasn’t exposed to FPGA or DSP as I wasn’t in the EE discipline at all but I can do all the math.<o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>No, I don’t want to spend time in getting to work. I estimate if I had been educated in class in using the toolchain like what I saw in the video I linked, and the tutorial that I am reading through, it would have saved me a whole summer’s worth of heads down work that I completed in 2013 on my own to take the lab bench parts (see picture) using MCF5270 to the proto-flight board (which had different pin outs and different peripherals and different BSP for the RTOS) that used MCF54415 family. To get around the requirement the flight software be mature, I had to develop my own ‘abstraction’ of the pin names/signal names/register maps so that I could (with limited money) test between the lab version (MCF5270) and the flight prototype EM-1 (MCF54415) interchangeably with a runtime firmware flag based upon what hardware was present. <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>Roughly this last year, I was coding BPSK modulators in C++ on my own just as a challenge, but I felt constrained by just programming and wanted to have real hardware to output a signal. Then I stumbled upon FPGA routines for generating carrier waves (ref: <a href="https://zipcpu.com/dsp/2017/07/11/simplest-sinewave-generator.html" target="_blank">https://zipcpu.com/dsp/2017/07/11/simplest-sinewave-generator.html</a> and <a href="http://www.andraka.com/files/crdcsrvy.pdf" target="_blank">http://www.andraka.com/files/crdcsrvy.pdf</a> and it just hit me on the head: I was thinking 50 year old design methods: code first and then separately design the mod/demod using discrete blocks etc. etc. -- <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><b><span style='font-size:12.0pt;color:black'>From:</span></b><span style='font-size:12.0pt;color:black'> Martin <<a href="mailto:dcmk1mr2@gmail.com">dcmk1mr2@gmail.com</a>> <br><b>Sent:</b> Saturday, March 14, 2020 5:08 PM<br><b>To:</b> Samudra Haque <<a href="mailto:samudra.haque@gmail.com">samudra.haque@gmail.com</a>><br><b>Cc:</b> Terry N4TLF <<a href="mailto:n4tlf@wb4jfi.com">n4tlf@wb4jfi.com</a>>; Tacos <<a href="mailto:tacos@amrad.org">tacos@amrad.org</a>><br><b>Subject:</b> Re: anyone with a entry level FPGA development board (VHDL support) they don't need?<o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>You are making extra work for yourself going Intel or Xilinx. Those design tools support a large variety of FPGAs - some of which are very large and complex and cost what a house goes for. You project requires a small, simple FPGA. Do you want to spend your time leaning a proprietary tool chain or the FPGA basics? <o:p></o:p></span></p><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'><a href="https://hackaday.com/2019/07/05/bringing-fpga-development-to-the-masses/" target="_blank">https://hackaday.com/2019/07/05/bringing-fpga-development-to-the-masses/</a> <o:p></o:p></span></p><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>--Martin <o:p></o:p></span></p></div></div></div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>On Sat, Mar 14, 2020 at 1:37 PM <<a href="mailto:samudra.haque@gmail.com">samudra.haque@gmail.com</a>> wrote:<o:p></o:p></span></p></div><blockquote style='border:none;border-left:solid #CCCCCC 1.0pt;padding:0in 0in 0in 6.0pt;margin-left:4.8pt;margin-top:5.0pt;margin-right:0in;margin-bottom:5.0pt;border-top-color:initial;border-right-color:initial;border-bottom-color:initial'><div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>Wow, I am learning a lot thanks to Taco’s forums. I regret not paying attention to FPGA world earlier. I just sat through 30 minutes of a free training course on Intel’s website: and a wholesome review of a tutorial using the flow chart shown below – and it would I am most sure at this point, be easy for me to replicate my manually designed electric rocket subsystem (see pics from 2015) control system, into an FPGA version down to the 10 uS synthetic reprogrammable timebase I had to design, to validate my multi-rocket synchronization routines – I honestly was just paying attention to the physics, and not to the EE techniques then. <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>Back then I was using Netburner hardware, and wholly customized PCB, with IGBT power switches and ~40 amp transient discharges from an inductive energy storage system I calculated manually. Well --- an FPGA containing a soft-core MCU, some external switches, RTOS application (the same possibly that I used in the RTOS of Netburner environment) and some barebones serial comms seem to be practical to implement with these methods, …. And I may be able to develop new control processes and drive other elements .. without much delay ! Perhaps even use the onboard NIOS II DSP section to do mod/demod ? BTW, I liked the training material 100 and 200 level FPGA courses on the intel website, free with registration. Like: <a href="https://www.intel.com/content/www/us/en/programmable/support/training/catalog.html?keywords=nios" target="_blank">https://www.intel.com/content/www/us/en/programmable/support/training/catalog.html?keywords=nios</a><o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><div><div style='border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0in 0in 0in;border-right-color:initial;border-bottom-color:initial;border-left-color:initial'><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><b><span style='font-size:12.0pt;color:black'>From:</span></b><span style='font-size:12.0pt;color:black'> Terry N4TLF <<a href="mailto:n4tlf@wb4jfi.com">n4tlf@wb4jfi.com</a>> <br><b>Sent:</b> Saturday, March 14, 2020 12:54 PM<br><b>To:</b> <a href="mailto:samudra.haque@gmail.com">samudra.haque@gmail.com</a>; 'Martin' <<a href="mailto:dcmk1mr2@gmail.com">dcmk1mr2@gmail.com</a>><br><b>Cc:</b> 'Tacos' <<a href="mailto:tacos@amrad.org">tacos@amrad.org</a>><br><b>Subject:</b> Re: anyone with a entry level FPGA development board (VHDL support) they don't need?<o:p></o:p></span></p></div></div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><div><div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:10.0pt;font-family:"Arial",sans-serif;color:black'>Here are a couple of books that might be of interest regarding Verilog:</span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:10.0pt;font-family:"Arial",sans-serif;color:black'> </span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:10.0pt;font-family:"Arial",sans-serif;color:black'>This book is interesting, and a little bit different. It doesn’t require actual hardware for most of it’s content. I bought the Kindle version.</span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:10.0pt;font-family:"Arial",sans-serif;color:black'><a href="https://www.amazon.com/Designing-Video-Game-Hardware-Verilog-ebook/dp/B07LD48CTV/ref=sr_1_5?keywords=verilog+book&qid=1584203304&sr=8-5" target="_blank" title="https://www.amazon.com/Designing-Video-Game-Hardware-Verilog-ebook/dp/B07LD48CTV/ref=sr_1_5?keywords=verilog+book&qid=1584203304&sr=8-5">https://www.amazon.com/Designing-Video-Game-Hardware-Verilog-ebook/dp/B07LD48CTV/ref=sr_1_5?keywords=verilog+book&qid=1584203304&sr=8-5</a></span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:10.0pt;font-family:"Arial",sans-serif;color:black'> </span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:10.0pt;font-family:"Arial",sans-serif;color:black'>THe title is accurate: a Concise guide to be sure. Again, not tied to any hardware, and somewhat light on details. Fairly thin.</span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:10.0pt;font-family:"Arial",sans-serif;color:black'><a href="https://www.amazon.com/Verilog-Example-Concise-Introduction-Design/dp/0983497303/ref=sr_1_1?keywords=verilog+book&qid=1584203528&sr=8-1" target="_blank" title="https://www.amazon.com/Verilog-Example-Concise-Introduction-Design/dp/0983497303/ref=sr_1_1?keywords=verilog+book&qid=1584203528&sr=8-1">https://www.amazon.com/Verilog-Example-Concise-Introduction-Design/dp/0983497303/ref=sr_1_1?keywords=verilog+book&qid=1584203528&sr=8-1</a></span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:10.0pt;font-family:"Arial",sans-serif;color:black'> </span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:10.0pt;font-family:"Arial",sans-serif;color:black'>I have the Kindle version of this book. It uses a few specific boards.</span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:10.0pt;font-family:"Arial",sans-serif;color:black'><a href="https://www.amazon.com/Programming-FPGAs-Getting-Started-Verilog-ebook/dp/B01M0F1L5G/ref=sr_1_2?keywords=verilog+book&qid=1584203803&sr=8-2" target="_blank" title="https://www.amazon.com/Programming-FPGAs-Getting-Started-Verilog-ebook/dp/B01M0F1L5G/ref=sr_1_2?keywords=verilog+book&qid=1584203803&sr=8-2">https://www.amazon.com/Programming-FPGAs-Getting-Started-Verilog-ebook/dp/B01M0F1L5G/ref=sr_1_2?keywords=verilog+book&qid=1584203803&sr=8-2</a></span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:10.0pt;font-family:"Arial",sans-serif;color:black'> </span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:10.0pt;font-family:"Arial",sans-serif;color:black'>THis is more expensive, I have the paper version. It has the most of my bookmarks of any book I have. That says it all.</span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:10.0pt;font-family:"Arial",sans-serif;color:black'><a href="https://www.amazon.com/Embedded-Design-Using-Programmable-Arrays/dp/1589094867/ref=sr_1_1?keywords=Embedded+design+using+Programmable&qid=1584204048&sr=8-1" target="_blank" title="https://www.amazon.com/Embedded-Design-Using-Programmable-Arrays/dp/1589094867/ref=sr_1_1?keywords=Embedded+design+using+Programmable&qid=1584204048&sr=8-1">https://www.amazon.com/Embedded-Design-Using-Programmable-Arrays/dp/1589094867/ref=sr_1_1?keywords=Embedded+design+using+Programmable&qid=1584204048&sr=8-1</a></span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:10.0pt;font-family:"Arial",sans-serif;color:black'> </span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:10.0pt;font-family:"Arial",sans-serif;color:black'>There are several other books that I have. Like many other technical references, there is not ONE single book that is best.</span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:10.0pt;font-family:"Arial",sans-serif;color:black'> </span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:10.0pt;font-family:"Arial",sans-serif;color:black'>I have used the Papilio and Digilent FPGA boards (among others) to help me learn most of what I have now forgotten, regarding FPGAs. I now have some newer boards boards based on Zynq FPGAs, such as the Red Pitaya, a MicroZed, and others. These are MUCH more powerful, but also much more complicated. My brain hurts whenever I delve into them.</span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:10.0pt;font-family:"Arial",sans-serif;color:black'> </span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:10.0pt;font-family:"Arial",sans-serif;color:black'>73, Terry, N4TLF</span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:10.0pt;font-family:"Arial",sans-serif;color:black'> </span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p></div><div><div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:10.0pt;font-family:"Tahoma",sans-serif;color:black'> </span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p></div><div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;background:whitesmoke'><b><span style='font-size:10.0pt;font-family:"Tahoma",sans-serif;color:black'>From:</span></b><span style='font-size:10.0pt;font-family:"Tahoma",sans-serif;color:black'> <a href="mailto:samudra.haque@gmail.com">samudra.haque@gmail.com</a> </span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;background:whitesmoke'><b><span style='font-size:10.0pt;font-family:"Tahoma",sans-serif;color:black'>Sent:</span></b><span style='font-size:10.0pt;font-family:"Tahoma",sans-serif;color:black'> Friday, March 13, 2020 8:42 PM</span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;background:whitesmoke'><b><span style='font-size:10.0pt;font-family:"Tahoma",sans-serif;color:black'>To:</span></b><span style='font-size:10.0pt;font-family:"Tahoma",sans-serif;color:black'> 'Martin' </span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;background:whitesmoke'><b><span style='font-size:10.0pt;font-family:"Tahoma",sans-serif;color:black'>Cc:</span></b><span style='font-size:10.0pt;font-family:"Tahoma",sans-serif;color:black'> 'Tacos' </span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;background:whitesmoke'><b><span style='font-size:10.0pt;font-family:"Tahoma",sans-serif;color:black'>Subject:</span></b><span style='font-size:10.0pt;font-family:"Tahoma",sans-serif;color:black'> RE: anyone with a entry level FPGA development board (VHDL support) they don't need?</span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p></div></div></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p></div></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>Hi Martin, thanks for the tip. I went looking for the board you recommended from Lattice (it’s offered at a good price) but if I am not mistaken, it doesn’t have any peripherals such as switches for onboard experiments? The photos show it comes with LEDs, but no switches.<o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>Then I went looking for the icestorm documentation and it seems they ship from UK (the blackice boards) so despite those development boards being chock full of accessories for experimentation, the shipping delay and cost sort of makes it expensive.<o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>So, randomly I searched and came across (comments requested) <b>for about $43.85 total with shipping</b>:<o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'><a href="https://www.ebay.com/itm/STEP-MAX10-Intel-Altera-FPGA-development-board/143318504573?hash=item215e72d47d%3Ag%3AlcQAAOSwARpdGDCw&LH_BO=1" target="_blank">https://www.ebay.com/itm/STEP-MAX10-Intel-Altera-FPGA-development-board/143318504573?hash=item215e72d47d%3Ag%3AlcQAAOSwARpdGDCw&LH_BO=1</a><o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>and according to the website <a href="http://www.stepfpga.org/step-max10-development-board/" target="_blank">http://www.stepfpga.org/step-max10-development-board/</a> it is fully supported by:<o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;margin-left:.5in'><span style='font-size:12.0pt;color:black'>Altera MAX10 FPGA: 10M02/10M08<o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;margin-left:.5in'><span style='font-size:12.0pt;color:black'>On board USB Blaster programming circuit<o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;margin-left:.5in'><span style='font-size:12.0pt;color:black'>2-character 7-segment display<o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;margin-left:.5in'><span style='font-size:12.0pt;color:black'>Two RGB LEDs<o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;margin-left:.5in'><span style='font-size:12.0pt;color:black'>Four switches<o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;margin-left:.5in'><span style='font-size:12.0pt;color:black'>Four push buttons<o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;margin-left:.5in'><span style='font-size:12.0pt;color:black'>Eight user LEDs<o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;margin-left:.5in'><span style='font-size:12.0pt;color:black'>Power from MicroUSB connector<o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;margin-left:.5in'><span style='font-size:12.0pt;color:black'>40 pins DIP connector with 36 User I/Os<o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;background:white'><span style='font-size:10.0pt;font-family:Symbol;color:#1A1A1A'>·</span><span style='font-size:7.0pt;font-family:"Times New Roman",serif;color:#1A1A1A'> </span><span style='font-size:12.0pt;font-family:"Georgia",serif;color:#1A1A1A'><a href="https://github.com/stepfpga/STEP-MAX10/blob/master/docs/STEP-MAX10%20Hardware%20Manual%201.0.pdf" target="_blank"><span style='color:#686868'>STEP-MAX10 Hardware Manual 1.0</span></a></span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;background:white'><span style='font-size:10.0pt;font-family:Symbol;color:#1A1A1A'>·</span><span style='font-size:7.0pt;font-family:"Times New Roman",serif;color:#1A1A1A'> </span><span style='font-size:12.0pt;font-family:"Georgia",serif;color:#1A1A1A'><a href="https://github.com/stepfpga/STEP-MAX10/blob/master/docs/STEP-MAX10%20Software%20Manual%201.0.pdf" target="_blank"><span style='color:#007ACC'>STEP-MAX10 Software Manual 1.0</span></a></span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;background:white'><span style='font-size:10.0pt;font-family:Symbol;color:#1A1A1A'>·</span><span style='font-size:7.0pt;font-family:"Times New Roman",serif;color:#1A1A1A'> </span><span style='font-size:12.0pt;font-family:"Georgia",serif;color:#1A1A1A'><a href="https://pan.baidu.com/s/1guMNzIYx2Q4sUGhQ1pSUvg" target="_blank"><span style='color:#007ACC'>STEP-MAX10 Source Code</span></a></span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;background:white'><span style='font-size:10.0pt;font-family:Symbol;color:#1A1A1A'>·</span><span style='font-size:7.0pt;font-family:"Times New Roman",serif;color:#1A1A1A'> </span><span style='font-size:12.0pt;font-family:"Georgia",serif;color:#1A1A1A'><a href="https://github.com/stepfpga/STEP-MAX10/blob/master/docs/STEP-MAX10%20Schematic.pdf" target="_blank"><span style='color:#007ACC'>STEP-MAX10 Schematic diagram</span></a></span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;background:white'><span style='font-size:10.0pt;font-family:Symbol;color:#1A1A1A'>·</span><span style='font-size:7.0pt;font-family:"Times New Roman",serif;color:#1A1A1A'> </span><span style='font-size:12.0pt;font-family:"Georgia",serif;color:#1A1A1A'><a href="http://fpgasoftware.intel.com/?edition=pro" target="_blank"><span style='color:#007ACC'>Software&Tools</span></a></span><span style='font-size:12.0pt;color:black'><o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>The software suite is … Altera (Microsoft) Quartus Prime Lite, which includes ModelSim for soft logic analyzer waveform output … and supports Verilog and VHDL. I think that could be ok for mid-level developers, right?<o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>But since the documentation says “<b>On board JTAG programming circuit</b>”, is an actual JTAG gadget still necessary for this device, or is that functionality already included somehow?<o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><b><span style='font-size:12.0pt;color:black'>From:</span></b><span style='font-size:12.0pt;color:black'> Martin <<a href="mailto:dcmk1mr2@gmail.com">dcmk1mr2@gmail.com</a>> <br><b>Sent:</b> Friday, March 13, 2020 7:26 PM<br><b>To:</b> Samudra Haque <<a href="mailto:samudra.haque@gmail.com">samudra.haque@gmail.com</a>><br><b>Cc:</b> Tacos <<a href="mailto:tacos@amrad.org">tacos@amrad.org</a>><br><b>Subject:</b> Re: anyone with a entry level FPGA development board (VHDL support) they don't need?<o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>You might want to take a look at <a href="https://www.amazon.com/LATTICE-SEMICONDUCTOR-ICE40HX1K-STICK-EVN-Evaluation-iCE40HX1K/dp/B00R3QU9K0" target="_blank">https://www.amazon.com/LATTICE-SEMICONDUCTOR-ICE40HX1K-STICK-EVN-Evaluation-iCE40HX1K/dp/B00R3QU9K0</a> for a board and do a google search for Windows iceStorm support. The are more expensive FPGAs from Intel/Altera amd Xilinx but the tool chains are awful.<o:p></o:p></span></p><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>You also might want to check to see if you really want to invest in VHDL or if Verilog might be better for your needs. It doesn't hurt to know both but Verilog is more like C and is less trouble to learn.<o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>Learning to simulate is a really import skill for FPGA development so you can get started with that before you have hardware.<o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p></div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>73 Martin W6MRR<o:p></o:p></span></p></div></div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>On Fri, Mar 13, 2020 at 3:50 PM <<a href="mailto:samudra.haque@gmail.com">samudra.haque@gmail.com</a>> wrote:<o:p></o:p></span></p></div><blockquote style='border:none;border-left:solid #CCCCCC 1.0pt;padding:0in 0in 0in 6.0pt;margin-left:4.8pt;margin-top:5.0pt;margin-right:0in;margin-bottom:5.0pt;border-top-color:initial;border-right-color:initial;border-bottom-color:initial'><div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>I would like to do an experiment with an FPGA development board. I’m looking for something with pinouts or with a switch + LED; My experience with VHDL is very limited. I will be using Windows 10 for my development environment. <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>If anyone has a board they don’t need, would you be willing to sell it at a Tippy’s Taco’s meetup to me? Send me the product manufacturer part number and your ask to <a href="mailto:samudra.haque@gmail.com">samudra.haque@gmail.com</a>. <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>Also, if I had no FPGA board, is there a emulator environment that I can compile the code and get a testbench / diagram of the signals? At least I could begin coding / developing the framework right away.<o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'> <o:p></o:p></span></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>73 de Samudra N3RDX<o:p></o:p></span></p></div></div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>_______________________________________________<br>Tacos mailing list<br><a href="mailto:Tacos@amrad.org">Tacos@amrad.org</a><br><a href="https://lists.amrad.org/mailman/listinfo/tacos" target="_blank">https://lists.amrad.org/mailman/listinfo/tacos</a><o:p></o:p></span></p></blockquote></div><div class=MsoNormal align=center style='text-align:center'><span style='font-size:12.0pt;color:black'><hr size=2 width="100%" align=center></span></div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:12.0pt;color:black'>_______________________________________________<br>Tacos mailing list<br><a href="mailto:Tacos@amrad.org">Tacos@amrad.org</a><br><a href="https://lists.amrad.org/mailman/listinfo/tacos" target="_blank">https://lists.amrad.org/mailman/listinfo/tacos</a><o:p></o:p></span></p></div></div></div></div></div></blockquote></div></div></div></blockquote></div></div></div></div></div></div></blockquote></div></blockquote></div></div></body></html>