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<DIV style="FONT-SIZE: 10pt; FONT-FAMILY: 'Arial'; COLOR: #000000">
<DIV>MicroBlaze used to cost significant dollars to use. PicoBlaze was the
smaller, no-cost option.</DIV>
<DIV> </DIV>
<DIV>Beware of hidden costs associated with the IDE tools. I bought one
Xilinx-based board, where the Vivaldo license was locked to the one board, and
for only a limited time. Once that time expired, yu needed to purchase a
regular license. On the other hand, the Altera line has/had issues where
they discontinue support for lines of FPGA chips as they update the IDE.</DIV>
<DIV> </DIV>
<DIV>One other point regarding FPGAs, most tend to be power hogs.</DIV>
<DIV>Terry</DIV>
<DIV> </DIV>
<DIV
style='FONT-SIZE: small; TEXT-DECORATION: none; FONT-FAMILY: "Calibri"; FONT-WEIGHT: normal; COLOR: #000000; FONT-STYLE: normal; DISPLAY: inline'>
<DIV style="FONT: 10pt tahoma">
<DIV> </DIV>
<DIV style="BACKGROUND: #f5f5f5">
<DIV style="font-color: black"><B>From:</B> <A
title=samudra.haque@gmail.com>samudra.haque@gmail.com</A> </DIV>
<DIV><B>Sent:</B> Monday, March 16, 2020 12:12 PM</DIV>
<DIV><B>To:</B> <A title=dcmk1mr2@gmail.com>'Martin'</A> </DIV>
<DIV><B>Cc:</B> <A title=n4tlf@wb4jfi.com>'Terry N4TLF'</A> ; <A
title=tacos@amrad.org>'Tacos'</A> </DIV>
<DIV><B>Subject:</B> RE: anyone with an entry level FPGA development board (VHDL
support) they don't need?</DIV></DIV></DIV>
<DIV> </DIV></DIV>
<DIV
style='FONT-SIZE: small; TEXT-DECORATION: none; FONT-FAMILY: "Calibri"; FONT-WEIGHT: normal; COLOR: #000000; FONT-STYLE: normal; DISPLAY: inline'>
<DIV class=WordSection1>
<P class=MsoNormal>Hey all, I just noticed from Joel’s list this one priced
economically at $35.90 … <A
href="https://www.seeedstudio.com/Spartan-Edge-Accelerator-Board-p-4261.html?utm_source=mailchimp&utm_medium=edm&utm_campaign=bazaar_0919&ct=t&mc_cid=2972c7f3ab&mc_eid=5f0fb45d80">https://www.seeedstudio.com/Spartan-Edge-Accelerator-Board-p-4261.html?utm_source=mailchimp&utm_medium=edm&utm_campaign=bazaar_0919&ct=t&mc_cid=2972c7f3ab&mc_eid=5f0fb45d80</A><o:p></o:p></P>
<P class=MsoNormal><o:p></o:p> </P>
<P class=MsoNormal>Looks interesting no? <SPAN
style="BACKGROUND: yellow; mso-highlight: yellow">if treated as a standalone
FPGA board</SPAN> – which it can be instead of an Arduino accessory. Any
drawbacks? It’s an FPGA development system I understand that. But then I
read that MicroBlaze (Vivado) that can then host FreeRTOS. <A
href="https://www.freertos.org/a00090.html#XILINX">https://www.freertos.org/a00090.html#XILINX</A>.<o:p></o:p></P>
<P class=MsoNormal><o:p></o:p> </P>
<P class=MsoNormal><o:p></o:p> </P>
<P class=MsoNormal>So, essentially a replacement for Intel Max 10, Nios II,
FreeRTOS combination, at a cheaper I think price, with more gates, and a
development board that is current production with a host of documentation?
<o:p></o:p></P>
<P class=MsoNormal><A
href="http://wiki.seeedstudio.com/Spartan-Edge-Accelerator-Board/">http://wiki.seeedstudio.com/Spartan-Edge-Accelerator-Board/</A><o:p></o:p></P>
<P class=MsoNormal><o:p></o:p> </P>
<P class=MsoNormal>Samudra<o:p></o:p></P>
<P class=MsoNormal><o:p></o:p> </P>
<DIV>
<DIV
style="BORDER-TOP: #e1e1e1 1pt solid; BORDER-RIGHT: medium none; BORDER-BOTTOM: medium none; PADDING-BOTTOM: 0in; PADDING-TOP: 3pt; PADDING-LEFT: 0in; BORDER-LEFT: medium none; PADDING-RIGHT: 0in">
<P class=MsoNormal><B>From:</B> samudra.haque@gmail.com
<samudra.haque@gmail.com> <BR><B>Sent:</B> Monday, March 16, 2020 11:30
AM<BR><B>To:</B> 'Martin' <dcmk1mr2@gmail.com><BR><B>Cc:</B> 'Terry N4TLF'
<n4tlf@wb4jfi.com>; 'Tacos' <tacos@amrad.org><BR><B>Subject:</B> RE:
anyone with an entry level FPGA development board (VHDL support) they don't
need?<o:p></o:p></P></DIV></DIV>
<P class=MsoNormal><o:p></o:p> </P>
<P class=MsoNormal>Hi, Martin, Terry – I zoomed through to try and Intel’s
Quartus and the Nios II Embedded Development System to go through a simulated
design cycle all the way upto a pin-out matching stage for a real processor. It
included adding specific Verilog code to handle some simple-enough signal flow
(and, xor, not) etc. for some of the control lines. I was able to figure out
quickly the workflow, to synthesize and reach stages before simulation which
included “wiring” up the section of the soft processor to the other soft
peripherals. <o:p></o:p></P>
<P class=MsoNormal><o:p></o:p> </P>
<P class=MsoNormal>I obviously don’t have hardware, and the tutorial assumed all
was available in the development board and did not try to actually
simulate the circuit as I wanted to evaluate how difficult the challenge of
learning these tools were going to be – my confidence is increasing because of
this.<o:p></o:p></P>
<P class=MsoNormal><o:p></o:p> </P>
<P class=MsoNormal>That said, another friend explained:<o:p></o:p></P>
<UL style="MARGIN-TOP: 0in" type=disc>
<LI class=MsoListParagraph
style="MARGIN-LEFT: 0in; mso-list: l1 level1 lfo3">FPGA<o:p></o:p>
<LI class=MsoListParagraph
style="MARGIN-LEFT: 0in; mso-list: l1 level1 lfo3">FPGA + soft CPU (e.g. Soft
processor core in an FPGA, perhaps many of them, and the rest available for
standard FPGA applications)<o:p></o:p>
<LI class=MsoListParagraph
style="MARGIN-LEFT: 0in; mso-list: l1 level1 lfo3">FPGA + hard CPU (e.g.
Silicon with an embedded hard processor core and FPGA section on same
die)<o:p></o:p></LI></UL>
<P class=MsoNormal><o:p></o:p> </P>
<P class=MsoPlainText>My hope is to run a FreeRTOS or uC/OS-II as
supervisory operating system, with command/telemetry/control/sensor management
roles. The FPGA would be for development of the all-important interfaces and
logic that would change from project to project. Low capacity (1200 bps, 9600
bps) RF communications. Absolutely target a lower power/lower capacity
system. <o:p></o:p></P>
<P class=MsoPlainText><o:p></o:p> </P>
<P class=MsoPlainText>So I was wondering if I could ask your opinion on this low
cost board I saw discussed in <A
href="https://joelw.id.au/FPGA/CheapFPGADevelopmentBoards">https://joelw.id.au/FPGA/CheapFPGADevelopmentBoards</A>,
from the OMTECH seller <A
href="https://www.aliexpress.com/item/4000323573953.html">https://www.aliexpress.com/item/4000323573953.html</A><o:p></o:p></P>
<P class=MsoNormal><o:p></o:p> </P>
<P class=MsoNormal>Are US equivalents available somewhere in the same price
range? It’s about the same price as a Intel Max10 FPGA development board
(No SOC)<o:p></o:p></P>
<P class=MsoNormal><o:p></o:p> </P>
<P class=MsoNormal>N3RDX<o:p></o:p></P>
<DIV>
<DIV
style="BORDER-TOP: #e1e1e1 1pt solid; BORDER-RIGHT: medium none; BORDER-BOTTOM: medium none; PADDING-BOTTOM: 0in; PADDING-TOP: 3pt; PADDING-LEFT: 0in; BORDER-LEFT: medium none; PADDING-RIGHT: 0in">
<P class=MsoNormal><B>From:</B> <A>samudra.haque@gmail.com</A>
<<A>samudra.haque@gmail.com</A>> <BR><B>Sent:</B> Sunday, March 15, 2020
1:01 PM<BR><B>To:</B> 'Martin' <<A>dcmk1mr2@gmail.com</A>><BR><B>Cc:</B>
'Terry N4TLF' <<A>n4tlf@wb4jfi.com</A>>; 'Tacos'
<<A>tacos@amrad.org</A>><BR><B>Subject:</B> RE: anyone with an entry level
FPGA development board (VHDL support) they don't
need?<o:p></o:p></P></DIV></DIV>
<P class=MsoNormal><o:p></o:p> </P>
<P class=MsoNormal>Thanks, I’ll have to spend time on different fpga vendor
websites. <o:p></o:p></P>
<P class=MsoNormal><o:p></o:p> </P>
<P class=MsoNormal><B>From:</B> Martin <<A>dcmk1mr2@gmail.com</A>>
<BR><B>Sent:</B> Saturday, March 14, 2020 7:06 PM<BR><B>To:</B> Samudra Haque
<<A>samudra.haque@gmail.com</A>><BR><B>Cc:</B> Terry N4TLF
<<A>n4tlf@wb4jfi.com</A>>; Tacos
<<A>tacos@amrad.org</A>><BR><B>Subject:</B> Re: anyone with an entry level
FPGA development board (VHDL support) they don't need?<o:p></o:p></P>
<P class=MsoNormal><o:p></o:p> </P>
<DIV>
<DIV>
<DIV>
<P class=MsoNormal>Samudra - the flowchart you posted is for the NIOS II
Embedded Processor Design Suite not Quartus Prime Lite for FPGA and
SoCs. NIOS II is a fairly complex 32 bit processor that you probably
would never need for an embedded system.<o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal><o:p></o:p> </P></DIV></DIV>
<P class=MsoNormal>If you want a complex development framework then Quartus is
probably a good choice - it will take you weeks or months to become
proficient. Once proficient you can start learning a HDL and FPGA
concepts. <o:p></o:p></P>
<DIV>
<P class=MsoNormal><o:p></o:p> </P></DIV>
<DIV>
<P class=MsoNormal>ISE Design Suite, the IDE for older low end Xilinx Spartan
FPGAs like the Spartan 6 has been deprecated to help sales of new chips.
<o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal><o:p></o:p> </P></DIV>
<DIV>
<P class=MsoNormal>Note that Intel/Altera makes money on IP and there's a lot of
open source stuff available for Lattice. I remember seeing an IDE that
worked like gnuradio-companion and took functional blocks like filters/
modulator/demodulator to compile for Lattice FPGAs. <o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal><o:p></o:p> </P></DIV>
<DIV>
<P class=MsoNormal>--Martin<o:p></o:p></P></DIV></DIV>
<P class=MsoNormal><o:p></o:p> </P>
<DIV>
<DIV>
<P class=MsoNormal>On Sat, Mar 14, 2020 at 3:12 PM
<<A>samudra.haque@gmail.com</A>> wrote:<o:p></o:p></P></DIV>
<BLOCKQUOTE
style="BORDER-TOP: medium none; BORDER-RIGHT: medium none; BORDER-BOTTOM: medium none; PADDING-BOTTOM: 0in; PADDING-TOP: 0in; PADDING-LEFT: 6pt; BORDER-LEFT: #cccccc 1pt solid; MARGIN: 5pt 0in 5pt 4.8pt; PADDING-RIGHT: 0in">
<DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto">Well, yes,
Martin, but I willing to take on a complex development framework during the
Corona virus downtimes for the benefit it might give me, as I get ready to
produce another piece of unique technology this year.<o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"> <o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto">I admit: so far
without an EE formal education, but rather a CS background with practical
hardware projects, I was 0.25 EE degree in 1989, 0.5 EE in 1997 when I
developed broadband microwave equipment, 0.75 EE by the post-grad development
from fundamentals to flight hardware. I wasn’t exposed to FPGA or DSP as I
wasn’t in the EE discipline at all but I can do all the math.<o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"> <o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto">No, I don’t want
to spend time in getting to work. I estimate if I had been educated in class
in using the toolchain like what I saw in the video I linked, and the tutorial
that I am reading through, it would have saved me a whole summer’s worth of
heads down work that I completed in 2013 on my own to take the lab bench parts
(see picture) using MCF5270 to the proto-flight board (which had different pin
outs and different peripherals and different BSP for the RTOS) that used
MCF54415 family. To get around the requirement the flight software be mature,
I had to develop my own ‘abstraction’ of the pin names/signal names/register
maps so that I could (with limited money) test between the lab version
(MCF5270) and the flight prototype EM-1 (MCF54415) interchangeably with a
runtime firmware flag based upon what hardware was present. <o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"> <o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto">Roughly this
last year, I was coding BPSK modulators in C++ on my own just as a challenge,
but I felt constrained by just programming and wanted to have real hardware to
output a signal. Then I stumbled upon FPGA routines for generating carrier
waves (ref: <A
href="https://zipcpu.com/dsp/2017/07/11/simplest-sinewave-generator.html"
target=_blank>https://zipcpu.com/dsp/2017/07/11/simplest-sinewave-generator.html</A>
and <A href="http://www.andraka.com/files/crdcsrvy.pdf"
target=_blank>http://www.andraka.com/files/crdcsrvy.pdf</A> and it just hit me
on the head: I was thinking 50 year old design methods: code first and
then separately design the mod/demod using discrete blocks etc. etc. --
<o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"> <o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><B>From:</B>
Martin <<A target=_blank>dcmk1mr2@gmail.com</A>> <BR><B>Sent:</B>
Saturday, March 14, 2020 5:08 PM<BR><B>To:</B> Samudra Haque <<A
target=_blank>samudra.haque@gmail.com</A>><BR><B>Cc:</B> Terry N4TLF <<A
target=_blank>n4tlf@wb4jfi.com</A>>; Tacos <<A
target=_blank>tacos@amrad.org</A>><BR><B>Subject:</B> Re: anyone with a
entry level FPGA development board (VHDL support) they don't
need?<o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"> <o:p></o:p></P>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto">You are making
extra work for yourself going Intel or Xilinx. Those design tools
support a large variety of FPGAs - some of which are very large and complex
and cost what a house goes for. You project requires a small, simple
FPGA. Do you want to spend your time leaning a proprietary tool chain or
the FPGA basics? <o:p></o:p></P>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"> <o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><A
href="https://hackaday.com/2019/07/05/bringing-fpga-development-to-the-masses/"
target=_blank>https://hackaday.com/2019/07/05/bringing-fpga-development-to-the-masses/</A> <o:p></o:p></P>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"> <o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto">--Martin
<o:p></o:p></P></DIV></DIV></DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"> <o:p></o:p></P>
<DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto">On Sat, Mar 14,
2020 at 1:37 PM <<A target=_blank>samudra.haque@gmail.com</A>>
wrote:<o:p></o:p></P></DIV>
<BLOCKQUOTE
style="BORDER-TOP: medium none; BORDER-RIGHT: medium none; BORDER-BOTTOM: medium none; PADDING-BOTTOM: 0in; PADDING-TOP: 0in; PADDING-LEFT: 6pt; BORDER-LEFT: #cccccc 1pt solid; MARGIN: 5pt 0in 5pt 4.8pt; PADDING-RIGHT: 0in">
<DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto">Wow, I am
learning a lot thanks to Taco’s forums. I regret not paying attention to
FPGA world earlier. I just sat through 30 minutes of a free training course
on Intel’s website: and a wholesome review of a tutorial using the flow
chart shown below – and it would I am most sure at this point, be easy for
me to replicate my manually designed electric rocket subsystem (see pics
from 2015) control system, into an FPGA version down to the 10 uS synthetic
reprogrammable timebase I had to design, to validate my multi-rocket
synchronization routines – I honestly was just paying attention to the
physics, and not to the EE techniques then. <o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"> <o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto">Back then I
was using Netburner hardware, and wholly customized PCB, with IGBT power
switches and ~40 amp transient discharges from an inductive energy storage
system I calculated manually. Well --- an FPGA containing a soft-core MCU,
some external switches, RTOS application (the same possibly that I used in
the RTOS of Netburner environment) and some barebones serial comms seem to
be practical to implement with these methods, …. And I may be able to
develop new control processes and drive other elements .. without much delay
! Perhaps even use the onboard NIOS II DSP section to do mod/demod ? BTW, I
liked the training material 100 and 200 level FPGA courses on the intel
website, free with registration. Like: <A
href="https://www.intel.com/content/www/us/en/programmable/support/training/catalog.html?keywords=nios"
target=_blank>https://www.intel.com/content/www/us/en/programmable/support/training/catalog.html?keywords=nios</A><o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"> <o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"> <o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><o:p></o:p> </P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"> <o:p></o:p></P>
<DIV>
<DIV
style="BORDER-TOP: #e1e1e1 1pt solid; BORDER-RIGHT: medium none; BORDER-BOTTOM: medium none; PADDING-BOTTOM: 0in; PADDING-TOP: 3pt; PADDING-LEFT: 0in; BORDER-LEFT: medium none; PADDING-RIGHT: 0in">
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><B>From:</B>
Terry N4TLF <<A target=_blank>n4tlf@wb4jfi.com</A>> <BR><B>Sent:</B>
Saturday, March 14, 2020 12:54 PM<BR><B>To:</B> <A
target=_blank>samudra.haque@gmail.com</A>; 'Martin' <<A
target=_blank>dcmk1mr2@gmail.com</A>><BR><B>Cc:</B> 'Tacos' <<A
target=_blank>tacos@amrad.org</A>><BR><B>Subject:</B> Re: anyone with a
entry level FPGA development board (VHDL support) they don't
need?<o:p></o:p></P></DIV></DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"> <o:p></o:p></P>
<DIV>
<DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Arial",sans-serif; COLOR: black'>Here
are a couple of books that might be of interest regarding
Verilog:</SPAN><o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Arial",sans-serif; COLOR: black'> </SPAN><o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Arial",sans-serif; COLOR: black'>This
book is interesting, and a little bit different. It doesn’t require
actual hardware for most of it’s content. I bought the Kindle
version.</SPAN><o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Arial",sans-serif; COLOR: black'><A
title=https://www.amazon.com/Designing-Video-Game-Hardware-Verilog-ebook/dp/B07LD48CTV/ref=sr_1_5?keywords=verilog+book&qid=1584203304&sr=8-5
href="https://www.amazon.com/Designing-Video-Game-Hardware-Verilog-ebook/dp/B07LD48CTV/ref=sr_1_5?keywords=verilog+book&qid=1584203304&sr=8-5"
target=_blank>https://www.amazon.com/Designing-Video-Game-Hardware-Verilog-ebook/dp/B07LD48CTV/ref=sr_1_5?keywords=verilog+book&qid=1584203304&sr=8-5</A></SPAN><o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Arial",sans-serif; COLOR: black'> </SPAN><o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Arial",sans-serif; COLOR: black'>THe
title is accurate: a Concise guide to be sure. Again, not tied to any
hardware, and somewhat light on details. Fairly
thin.</SPAN><o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Arial",sans-serif; COLOR: black'><A
title=https://www.amazon.com/Verilog-Example-Concise-Introduction-Design/dp/0983497303/ref=sr_1_1?keywords=verilog+book&qid=1584203528&sr=8-1
href="https://www.amazon.com/Verilog-Example-Concise-Introduction-Design/dp/0983497303/ref=sr_1_1?keywords=verilog+book&qid=1584203528&sr=8-1"
target=_blank>https://www.amazon.com/Verilog-Example-Concise-Introduction-Design/dp/0983497303/ref=sr_1_1?keywords=verilog+book&qid=1584203528&sr=8-1</A></SPAN><o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Arial",sans-serif; COLOR: black'> </SPAN><o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Arial",sans-serif; COLOR: black'>I
have the Kindle version of this book. It uses a few specific
boards.</SPAN><o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Arial",sans-serif; COLOR: black'><A
title=https://www.amazon.com/Programming-FPGAs-Getting-Started-Verilog-ebook/dp/B01M0F1L5G/ref=sr_1_2?keywords=verilog+book&qid=1584203803&sr=8-2
href="https://www.amazon.com/Programming-FPGAs-Getting-Started-Verilog-ebook/dp/B01M0F1L5G/ref=sr_1_2?keywords=verilog+book&qid=1584203803&sr=8-2"
target=_blank>https://www.amazon.com/Programming-FPGAs-Getting-Started-Verilog-ebook/dp/B01M0F1L5G/ref=sr_1_2?keywords=verilog+book&qid=1584203803&sr=8-2</A></SPAN><o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Arial",sans-serif; COLOR: black'> </SPAN><o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Arial",sans-serif; COLOR: black'>THis
is more expensive, I have the paper version. It has the most of my
bookmarks of any book I have. That says it
all.</SPAN><o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Arial",sans-serif; COLOR: black'><A
title=https://www.amazon.com/Embedded-Design-Using-Programmable-Arrays/dp/1589094867/ref=sr_1_1?keywords=Embedded+design+using+Programmable&qid=1584204048&sr=8-1
href="https://www.amazon.com/Embedded-Design-Using-Programmable-Arrays/dp/1589094867/ref=sr_1_1?keywords=Embedded+design+using+Programmable&qid=1584204048&sr=8-1"
target=_blank>https://www.amazon.com/Embedded-Design-Using-Programmable-Arrays/dp/1589094867/ref=sr_1_1?keywords=Embedded+design+using+Programmable&qid=1584204048&sr=8-1</A></SPAN><o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Arial",sans-serif; COLOR: black'> </SPAN><o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Arial",sans-serif; COLOR: black'>There
are several other books that I have. Like many other technical
references, there is not ONE single book that is
best.</SPAN><o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Arial",sans-serif; COLOR: black'> </SPAN><o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Arial",sans-serif; COLOR: black'>I
have used the Papilio and Digilent FPGA boards (among others) to help me
learn most of what I have now forgotten, regarding FPGAs. I now have
some newer boards boards based on Zynq FPGAs, such as the Red Pitaya, a
MicroZed, and others. These are MUCH more powerful, but also much more
complicated. My brain hurts whenever I delve into
them.</SPAN><o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Arial",sans-serif; COLOR: black'> </SPAN><o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Arial",sans-serif; COLOR: black'>73,
Terry, N4TLF</SPAN><o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Arial",sans-serif; COLOR: black'> </SPAN><o:p></o:p></P></DIV>
<DIV>
<DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Tahoma",sans-serif; COLOR: black'> </SPAN><o:p></o:p></P></DIV>
<DIV>
<DIV>
<P class=MsoNormal
style="BACKGROUND: whitesmoke; mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><B><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Tahoma",sans-serif; COLOR: black'>From:</SPAN></B><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Tahoma",sans-serif; COLOR: black'> <A
target=_blank>samudra.haque@gmail.com</A> </SPAN><o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal
style="BACKGROUND: whitesmoke; mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><B><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Tahoma",sans-serif; COLOR: black'>Sent:</SPAN></B><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Tahoma",sans-serif; COLOR: black'>
Friday, March 13, 2020 8:42 PM</SPAN><o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal
style="BACKGROUND: whitesmoke; mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><B><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Tahoma",sans-serif; COLOR: black'>To:</SPAN></B><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Tahoma",sans-serif; COLOR: black'>
'Martin' </SPAN><o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal
style="BACKGROUND: whitesmoke; mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><B><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Tahoma",sans-serif; COLOR: black'>Cc:</SPAN></B><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Tahoma",sans-serif; COLOR: black'>
'Tacos' </SPAN><o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal
style="BACKGROUND: whitesmoke; mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><B><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Tahoma",sans-serif; COLOR: black'>Subject:</SPAN></B><SPAN
style='FONT-SIZE: 10pt; FONT-FAMILY: "Tahoma",sans-serif; COLOR: black'> RE:
anyone with a entry level FPGA development board (VHDL support) they don't
need?</SPAN><o:p></o:p></P></DIV></DIV></DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="FONT-SIZE: 12pt; COLOR: black"> </SPAN><o:p></o:p></P></DIV></DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black">Hi Martin, thanks for the tip. I went looking for the
board you recommended from Lattice (it’s offered at a good price) but if I
am not mistaken, it doesn’t have any peripherals such as switches for
onboard experiments? The photos show it comes with LEDs, but no
switches.</SPAN><o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black"> </SPAN><o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black">Then I went looking for the icestorm documentation and
it seems they ship from UK (the blackice boards) so despite those
development boards being chock full of accessories for experimentation, the
shipping delay and cost sort of makes it expensive.</SPAN><o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black"> </SPAN><o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black">So, randomly I searched and came across (comments
requested) <B>for about $43.85 total with
shipping</B>:</SPAN><o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black"> </SPAN><o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black"><A
href="https://www.ebay.com/itm/STEP-MAX10-Intel-Altera-FPGA-development-board/143318504573?hash=item215e72d47d%3Ag%3AlcQAAOSwARpdGDCw&LH_BO=1"
target=_blank>https://www.ebay.com/itm/STEP-MAX10-Intel-Altera-FPGA-development-board/143318504573?hash=item215e72d47d%3Ag%3AlcQAAOSwARpdGDCw&LH_BO=1</A></SPAN><o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black"> </SPAN><o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black">and according to the website <A
href="http://www.stepfpga.org/step-max10-development-board/"
target=_blank>http://www.stepfpga.org/step-max10-development-board/</A>
it is fully supported by:</SPAN><o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black"> </SPAN><o:p></o:p></P>
<P class=MsoNormal
style="MARGIN-LEFT: 0.5in; mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black">Altera MAX10 FPGA: 10M02/10M08</SPAN><o:p></o:p></P>
<P class=MsoNormal
style="MARGIN-LEFT: 0.5in; mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black">On board USB Blaster programming
circuit</SPAN><o:p></o:p></P>
<P class=MsoNormal
style="MARGIN-LEFT: 0.5in; mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black">2-character 7-segment display</SPAN><o:p></o:p></P>
<P class=MsoNormal
style="MARGIN-LEFT: 0.5in; mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black">Two RGB LEDs</SPAN><o:p></o:p></P>
<P class=MsoNormal
style="MARGIN-LEFT: 0.5in; mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black">Four switches</SPAN><o:p></o:p></P>
<P class=MsoNormal
style="MARGIN-LEFT: 0.5in; mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black">Four push buttons</SPAN><o:p></o:p></P>
<P class=MsoNormal
style="MARGIN-LEFT: 0.5in; mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black">Eight user LEDs</SPAN><o:p></o:p></P>
<P class=MsoNormal
style="MARGIN-LEFT: 0.5in; mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black">Power from MicroUSB connector</SPAN><o:p></o:p></P>
<P class=MsoNormal
style="MARGIN-LEFT: 0.5in; mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black">40 pins DIP connector with 36 User
I/Os</SPAN><o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black"> </SPAN><o:p></o:p></P>
<P class=MsoNormal
style="BACKGROUND: white; mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="FONT-SIZE: 10pt; FONT-FAMILY: symbol; COLOR: #1a1a1a">·</SPAN><SPAN
style='FONT-SIZE: 7pt; FONT-FAMILY: "Times New Roman",serif; COLOR: #1a1a1a'>
</SPAN><SPAN
style='FONT-SIZE: 12pt; FONT-FAMILY: "Georgia",serif; COLOR: #1a1a1a'><A
href="https://github.com/stepfpga/STEP-MAX10/blob/master/docs/STEP-MAX10%20Hardware%20Manual%201.0.pdf"
target=_blank><SPAN style="COLOR: #686868">STEP-MAX10 Hardware Manual
1.0</SPAN></A></SPAN><o:p></o:p></P>
<P class=MsoNormal
style="BACKGROUND: white; mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="FONT-SIZE: 10pt; FONT-FAMILY: symbol; COLOR: #1a1a1a">·</SPAN><SPAN
style='FONT-SIZE: 7pt; FONT-FAMILY: "Times New Roman",serif; COLOR: #1a1a1a'>
</SPAN><SPAN
style='FONT-SIZE: 12pt; FONT-FAMILY: "Georgia",serif; COLOR: #1a1a1a'><A
href="https://github.com/stepfpga/STEP-MAX10/blob/master/docs/STEP-MAX10%20Software%20Manual%201.0.pdf"
target=_blank><SPAN style="COLOR: #007acc">STEP-MAX10 Software Manual
1.0</SPAN></A></SPAN><o:p></o:p></P>
<P class=MsoNormal
style="BACKGROUND: white; mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="FONT-SIZE: 10pt; FONT-FAMILY: symbol; COLOR: #1a1a1a">·</SPAN><SPAN
style='FONT-SIZE: 7pt; FONT-FAMILY: "Times New Roman",serif; COLOR: #1a1a1a'>
</SPAN><SPAN
style='FONT-SIZE: 12pt; FONT-FAMILY: "Georgia",serif; COLOR: #1a1a1a'><A
href="https://pan.baidu.com/s/1guMNzIYx2Q4sUGhQ1pSUvg" target=_blank><SPAN
style="COLOR: #007acc">STEP-MAX10 Source
Code</SPAN></A></SPAN><o:p></o:p></P>
<P class=MsoNormal
style="BACKGROUND: white; mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="FONT-SIZE: 10pt; FONT-FAMILY: symbol; COLOR: #1a1a1a">·</SPAN><SPAN
style='FONT-SIZE: 7pt; FONT-FAMILY: "Times New Roman",serif; COLOR: #1a1a1a'>
</SPAN><SPAN
style='FONT-SIZE: 12pt; FONT-FAMILY: "Georgia",serif; COLOR: #1a1a1a'><A
href="https://github.com/stepfpga/STEP-MAX10/blob/master/docs/STEP-MAX10%20Schematic.pdf"
target=_blank><SPAN style="COLOR: #007acc">STEP-MAX10 Schematic
diagram</SPAN></A></SPAN><o:p></o:p></P>
<P class=MsoNormal
style="BACKGROUND: white; mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="FONT-SIZE: 10pt; FONT-FAMILY: symbol; COLOR: #1a1a1a">·</SPAN><SPAN
style='FONT-SIZE: 7pt; FONT-FAMILY: "Times New Roman",serif; COLOR: #1a1a1a'>
</SPAN><SPAN
style='FONT-SIZE: 12pt; FONT-FAMILY: "Georgia",serif; COLOR: #1a1a1a'><A
href="http://fpgasoftware.intel.com/?edition=pro" target=_blank><SPAN
style="COLOR: #007acc">Software&Tools</SPAN></A></SPAN><o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black">The software suite is … Altera (Microsoft) Quartus
Prime Lite, which includes ModelSim for soft logic analyzer waveform output
… and supports Verilog and VHDL. I think that could be ok for mid-level
developers, right?</SPAN><o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black"> </SPAN><o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black">But since the documentation says “<B>On board JTAG
programming circuit</B>”, is an actual JTAG gadget still necessary for this
device, or is that functionality already included
somehow?</SPAN><o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black"> </SPAN><o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><o:p></o:p> </P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black"> </SPAN><o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black"> </SPAN><o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><B><SPAN
style="COLOR: black">From:</SPAN></B><SPAN style="COLOR: black"> Martin
<<A target=_blank>dcmk1mr2@gmail.com</A>> <BR><B>Sent:</B> Friday,
March 13, 2020 7:26 PM<BR><B>To:</B> Samudra Haque <<A
target=_blank>samudra.haque@gmail.com</A>><BR><B>Cc:</B> Tacos <<A
target=_blank>tacos@amrad.org</A>><BR><B>Subject:</B> Re: anyone with a
entry level FPGA development board (VHDL support) they don't
need?</SPAN><o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black"> </SPAN><o:p></o:p></P>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black">You might want to take a look at <A
href="https://www.amazon.com/LATTICE-SEMICONDUCTOR-ICE40HX1K-STICK-EVN-Evaluation-iCE40HX1K/dp/B00R3QU9K0"
target=_blank>https://www.amazon.com/LATTICE-SEMICONDUCTOR-ICE40HX1K-STICK-EVN-Evaluation-iCE40HX1K/dp/B00R3QU9K0</A>
for a board and do a google search for Windows iceStorm support. The
are more expensive FPGAs from Intel/Altera amd Xilinx but the tool chains
are awful.</SPAN><o:p></o:p></P>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black"> </SPAN><o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black">You also might want to check to see if you really want
to invest in VHDL or if Verilog might be better for your needs. It
doesn't hurt to know both but Verilog is more like C and is less trouble to
learn.</SPAN><o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black"> </SPAN><o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black">Learning to simulate is a really import skill for FPGA
development so you can get started with that before you have
hardware.</SPAN><o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black"> </SPAN><o:p></o:p></P></DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black">73 Martin W6MRR</SPAN><o:p></o:p></P></DIV></DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black"> </SPAN><o:p></o:p></P>
<DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black">On Fri, Mar 13, 2020 at 3:50 PM <<A
target=_blank>samudra.haque@gmail.com</A>>
wrote:</SPAN><o:p></o:p></P></DIV>
<BLOCKQUOTE
style="BORDER-TOP: medium none; BORDER-RIGHT: medium none; BORDER-BOTTOM: medium none; PADDING-BOTTOM: 0in; PADDING-TOP: 0in; PADDING-LEFT: 6pt; BORDER-LEFT: #cccccc 1pt solid; MARGIN: 5pt 0in 5pt 4.8pt; PADDING-RIGHT: 0in">
<DIV>
<DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black">I would like to do an experiment with an FPGA
development board. I’m looking for something with pinouts or with a switch
+ LED; My experience with VHDL is very limited. I will be using Windows 10
for my development environment. </SPAN><o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black"> </SPAN><o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black">If anyone has a board they don’t need, would you be
willing to sell it at a Tippy’s Taco’s meetup to me? Send me the product
manufacturer part number and your ask to <A
target=_blank>samudra.haque@gmail.com</A>. </SPAN><o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black"> </SPAN><o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black">Also, if I had no FPGA board, is there a emulator
environment that I can compile the code and get a testbench / diagram of
the signals? At least I could begin coding / developing the framework
right away.</SPAN><o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black"> </SPAN><o:p></o:p></P>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black">73 de Samudra N3RDX</SPAN><o:p></o:p></P></DIV></DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="COLOR: black">_______________________________________________<BR>Tacos
mailing list<BR><A target=_blank>Tacos@amrad.org</A><BR><A
href="https://lists.amrad.org/mailman/listinfo/tacos"
target=_blank>https://lists.amrad.org/mailman/listinfo/tacos</A></SPAN><o:p></o:p></P></BLOCKQUOTE></DIV>
<DIV class=MsoNormal style="TEXT-ALIGN: center" align=center><SPAN
style="FONT-SIZE: 12pt; COLOR: black">
<HR align=center SIZE=2 width="100%">
</SPAN></DIV>
<P class=MsoNormal
style="mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><SPAN
style="FONT-SIZE: 12pt; COLOR: black">_______________________________________________<BR>Tacos
mailing list<BR><A target=_blank>Tacos@amrad.org</A><BR><A
href="https://lists.amrad.org/mailman/listinfo/tacos"
target=_blank>https://lists.amrad.org/mailman/listinfo/tacos</A></SPAN><o:p></o:p></P></DIV></DIV></DIV></DIV></DIV></BLOCKQUOTE></DIV></DIV></DIV></BLOCKQUOTE></DIV></DIV></DIV></DIV></DIV></BODY></HTML>