SAQ transmission of today June30th at 12:00 UTC

[Alberto di Bene]

On 7/1/2013 3:53 PM, Martin wrote:

> /Very impressive Alberto!/
> /
> /
> /Could you provide more details on the RF sampler board you're using?  When you release the code could you please 
> include the RF sampler HDL?/
> /
> /
> /Have you looked at using a larger FPGA and a soft processor in place of the ARM chip?/
> /
> /
> /Thanks,/
> /
> /
> /Martin//
> /

Thanks Martin,

The FPGA on the RF sampler is the XC3S400 model of the Spartan line, and the ADC is the TI ADS4142,
14-bit, 65 Ms/sec. In the Web page I wrote erroneously that the RF sampling is done at 66+ MHz, actually
the sampling frequency is 61.44 MHz.  The large VLSI chip is the CY7C68013A from Cypress, which is a micro
and an USB controller.

The source code of the FPGA in an intellectual property of Elad, and hence I cannot release it.
As said in my previous message, what I will release is the ARM source code of a version that does the
sampling using the ADC on board of the ARM chip itself, which will sample at 1.5 MHz, good for VLF and LF.

In my plans there is the substitution of the STM32F4 chip with an Odroid board (U2 or X2), which is
a board that can run Linux or Android on a quad core, 1.7 GHz ARM 9 chip, much more powerful than
the Raspberry Pi that is the rage of the moment. This means that I will have to wet my feet with
Linux, a thing that I have carefully avoided up to now... :-)

But that will have to wait until the end of this year, when I will have a bit more free time (hopefully...)

73  Alberto  I2PHD


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