design / development question FPGA (Xilinx), DDS and RF output

[kf4hcw]

On 2/22/21 12:31 PM, samudra.haque at gmail.com wrote:
> Can I ask for a suggestion on how I  can simulate it using spice?  OTOH I am wondering which filter calculator might be useful to generate industry compatible part values - I see a few listed on google search. Or, are filter blocks available from a vendor if I wanted to create a board for testing?
>
> Conceptually since the pulse train would be square waves would I need to use a LPF followed by a HPF stage to allow just the desired carrier to get through, or only LPF ? 

You only really need a low pass filter if your baseband is the desired
carrier... all the rest from the square waves are odd harmonics.

Any filter designer you like will produce values that are close -- you
can sometimes pick a designer that will let you push a button and get
the values rounded to "standard values" --- or if not, take what you get
and round them yourself and see what the new values give you.

If you don't want to synthesize the carrier in your fpga then make it
single frequency, then mix it up to whatever you like on the outside--
though that seems a bit of a waste since just making bpsk out of xoring
data to your clock is trivial work for an fpga.

_M

-- 
kf4hcw
Pete McNeil
lifeatwarp9.com/kf4hcw