FPGA progress of sorts

[Frank Gentges]

Terry,

That is real progress.  We are trying to learn to work with these FPGAs. 
  You are getting up on the step.  I have yet to run the software to do 
anything at all.

Frank K0BRA


Terry Fox wrote:
> Last weekend, I created an FPGA project for the Nexys2 board that uses 
> the DDS Intellectual Property (IP) in the Xilinx IP core.  The output of 
> the DDS was fed to a small D/A board (PMOD DA2) that is available from 
> Digilent, that has two 12-bit D/A chips on it.  It worked great, after 
> some debugging.  The reason for doing this was to learn how to use the 
> Xilinx IP cores.  After I got the basic DDS going with one D/A chip, I 
> rebuilt the DDS IP to have both sine and cosine outputs, then fed those 
> to the two D/A chips.  The result was as predicted, two sine waves 90 
> degrees apart, albeit at only 25kHz.
> 
>  
> 
> Today, I built up a small board that plugs into two PMOD jacks on the 
> Digilent Nexys2 FPGA board, which has one AD9744 14-bit 200+Ms/s D/A 
> converter chip.  This is the same D/A used on the HPSDR Penelope and the 
> Ahlstrom digital transmitter board, and has a significantly higher clock 
> frequency (up to 210 Ms/s).
> 
>  
> 
> The gods were smiling on me.  Not only did I wire up the board correctly 
> the first time, but my first attempt at FPGA code to drive this D/A chip 
> worked right out of the gate!!!  No errors, but a few warnings.  Right 
> now, the AD9744 D/A output is also only 25kHz, but I plan to build a 
> completely new FPGA project that will have the chip make RF from a DDS.  
> Then, I will change to a digital up-converter (DUC), which uses a 
> Cordic, CIC, and FIR filters.  All these pieces are also available as 
> free-to-use-on-Xilinx FPGA IP along with the basic Xilinx software. 
> There is also a fast FFT, and other stuff.  In addition, there is a lot 
> of IP that does cost money to use, but I don’t think we need to use any 
> of it.  I’m using Verilog now, and have found a couple of books that may 
> be of interest to fellow beginners.
> 
>  
> 
> Both the HPSDR and QS-1R projects also have SDR FPGA Verilog code that 
> is generally useable by hams.
> 
>  
> 
> This FPGA stuff is becoming very interesting!
> 
>  
> 
> (I’m hoping to prod more AMRADer’s into SDR interest here….)
> 
>  
> 
> Terry
> 
> WB4JFI
> 
>  
> 
> 
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